1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory in which data can be written and deleted electrically, and whose memory cell can store 2-bit data.
2. Description of the Related Art
Conventionally, a nonvolatile semiconductor memory was proposed by Ogura, et al. in “Embedded Twin MONOS Flash Memories with 4 ns and 15 ns Fast Access Times”, (2003 Symposium on VLSI Circuits Digest of Technical Papers, p. 207-210″). In the proposal, data of two bits or more are stored into one memory cell having the four or more thresholds. Generally, an ONO (Oxide-Nitride-Oxide) film is used as a charge storage layer in such a nonvolatile semiconductor memory of 2-bit/cell type that a storage region is formed on either side of a control gate independently.
FIG. 1 is a plane view showing the nonvolatile semiconductor memory of the 2-bit/cell type. FIG. 2 is a cross-section view showing a cell configuration of the memory. As shown in FIGS. 1 and 2, in the conventional nonvolatile semiconductor memory of 2-bit/cell type, STI (shallow Trench Isolation) films 102 are formed on the surface of a silicon substrate 112 in the column direction to have an island structure. A diffusion layer 101 is formed in a region between the STI films 102 adjacent to each other in the column direction on the surface of the silicon substrate 112. The diffusion layers 101 are intermittingly formed in the region between the STI films 102 adjacent to each other in the row direction to put a channel region therebetween. That is, the diffusion layers 101 formed in the row direction to put the STI film 102 therebetween are connected by the diffusion layer 101 formed in the region between the STI films 102 adjacent to each other in the column direction. A contact 105 is formed on the diffusion layer 101 formed in the region between the STI films 102 adjacent to each other in the column direction.
A plurality of control gates 103 are formed on channel regions in the silicon substrate 112 through gate insulating films 113 to extend into the row direction. Charge storage layers 107a and 107b are respectively formed on the both sides of the control gate 103. The storage layers 107a and 107b are formed from ONO films, in which a first silicon oxide 108, a silicon nitride film 109, and second silicon oxide 110 are laminated in this order. Memory gates 104a and 104b are formed on the storage layers 107a and 107b, and sidewalls 111 are formed on the side of the charge storage layer 107a and 107b. In addition, a bit line 106 is formed as an upper layer extending in the column direction and connected with the contact 105.
In this way, in the conventional nonvolatile semiconductor memory of 2-bit/cell type, the memory cells arranged in the row direction are isolated from each other by the STI films 102, and are connected with the bit line 106 in the column direction. Four memory cells share one contact 105. Therefore, it is possible to reduce the size of the memory cell per one bit.
Next, an operation of the conventional nonvolatile semiconductor memory will be described. For instance, high voltages are applied to the control gate and the memory gate in a write operation, the diffusion layers not adjacent is grounded. As a result, channel hot electrons are generated and captured to the silicon nitride film of the charge storage layer. The threshold voltage of the cell transistor is changed by the electrons captured in the charge storage layer. In the read operation, the difference of the threshold voltage is detected.
However, there is a problem described below in the above-mentioned conventional technique. That is, in the conventional nonvolatile semiconductor memory device shown in FIG. 1, the diffusion layer 101 is formed between the STI films 102 arranged into the column direction and the bit line 106 is formed to extend in the column direction. The contacts 105 are formed on the diffusion layers 101. For this reason, the device separation film 102 must be formed like an island. When the device isolation is carried out by use of an STI method, it is difficult to form the STI film 102 with a rectangular shape, viewing from the above, and the corner sometimes becomes round. When the memory gate is arranged on the round corner of the STI film 102, a deviation in characteristic of the memory cell is caused due to variance in the manufacturing process.